ADT7476EBZEVB【PDF 20/65 页】BOARD EVALUATION FOR ADT7476

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ADT7476

Table 27. FAN LIMIT REGISTERS

Register Description

Default

Fan TACH measurements are made in parallel and are not

synchronized with the analog measurements in any way.

0x54

0x55

0x56

0x57

0x58

0x59

0x5A

0x5B

TACH1 Minimum Low Byte

TACH1 Minimum High Byte

TACH2 Minimum Low Byte

TACH2 Minimum High Byte

TACH3 Minimum Low Byte

TACH3 Minimum High Byte

TACH4 Minimum Low Byte

TACH4 Minimum High Byte

0xFF

0xFF

0xFF

0xFF

0xFF

0xFF

0xFF

0xFF

Status Registers

The results of limit comparisons are stored in Interrupt

Status Register 1 and Interrupt Status Register 2. The status

register bit for each channel reflects the status of the last

measurement and limit comparison on that channel. If a

measurement is within limits, the corresponding status register

bit is cleared to 0. If the measurement is out-of-limits, the

corresponding status register bit is set to 1.

The state of the various measurement channels can be

polled by reading the status registers over the serial bus. In

Out-of-Limit Comparisons

Once all limits have been programmed, the ADT7476 can

be enabled for monitoring. The ADT7476 measures all

voltage and temperature measurements in round robin

format and sets the appropriate status bit for out-of-limit

conditions. TACH measurements are not part of this round

robin cycle. Comparisons are done differently depending on

whether the measured value is being compared to a high or

low limit.

High Limit: > Comparison Performed

Low Limit: ≤ Comparison Performed

Voltage and temperature channels use a window

comparator for error detecting and, therefore, have high and

low limits. Fan speed measurements use only a low limit.

This fan limit is needed only in manual fan control mode.

Analog Monitoring Cycle Time

The analog monitoring cycle begins when a 1 is written to

the start bit (Bit 0) of Configuration Register 1 (0x40). The

ADC measures each analog input in turn, and, as each

measurement is completed, the result is automatically stored

Bit 7 (OOL) of Interrupt Status Register 1 (0x41), 1 means

an out-of-limit event has been flagged in Interrupt Status

Register 2. This means the user also needs to read Interrupt

Status Register 2. Alternatively, Pin 10 or Pin 14 can be

configured as an SMBALERT output. This hard interrupt

automatically notifies the system supervisor of an

out-of-limit condition. Reading the status registers clears the

appropriate status bit as long as the error condition that

caused the interrupt has cleared. Status register bits are

sticky. Whenever a status bit is set, indicating an out-of-limit

condition, it remains set even if the event that caused it has

gone away (until read).

The only way to clear the status bit is to read the status

register after the event has gone away. Interrupt mask

registers (0x74 and 0x75) allow individual interrupt sources

to be masked from causing an SMBALERT. However, if one

of these masked interrupt sources goes out-of-limit, its

associated status bit is set in the status registers.

Table 28. INTERRUPT STATUS REGISTER 1 (0X41)

Bit Mnemonic Description

in the appropriate value register. This round robin

monitoring cycle continues unless disabled by writing a 0 to

Bit 0 of Configuration Register 1.

As the ADC is normally left to free-run in this manner, the

time taken to monitor all the analog inputs is normally not

of interest, because the most recently measured value of any

input can be read out at any time.

For applications where the monitoring cycle time is

important, it can easily be calculated.

The total number of channels measured is:

? Four Dedicated Supply Voltage Inputs

? Supply Voltage (V CC Pin)

? Local Temperature

? Two Remote Temperatures

As mentioned previously, the ADC performs round robin

conversions and takes 11 ms for each voltage measurement,

12 ms for a local temperature reading, and 39 ms for each

remote temperature reading. The total monitoring cycle time

for averaged voltage and temperature monitoring is,

7

6

5

4

3

2

1

0

OOL

R2T

LT

R1T

5.0 V

V CC

V CCP

2.5 V

1 denotes a bit in Interrupt Status

Register 2 is set and Interrupt Status

Register 2 should be read.

1 indicates that the Remote 2

Temperature High or Low limit has been

exceeded.

1 indicates that the Local Temperature

High or Low Limit has been exceeded.

1 indicates that the Remote 1

Temperature High or Low Limit has

been exceeded.

1 indicates that the 5.0 V High or Low

Limit has been exceeded.

1 indicates that the V CC High or Low

Limit has been exceeded.

1 indicates that the V CCP High or Low

Limit has been exceeded.

1 indicates that the 2.5 V High or Low

Limit has been exceeded.

If the 2. 5 V input is configured as

THERM , this bit represents the status of

THERM.

therefore, nominally:

(5

11) ) 12 ) (2

39) + 145 ms

(eq. 3)

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